On Proving Circuit Lower Bounds against the Polynomial-Time Hierarchy: Positive and Negative Results

We consider the problem of proving circuit lower bounds against the polynomialtime hierarchy. We give both positive and negative results. For the positive side, for any fixed integer k > 0, we give an explicit Σp2 language, acceptable by a Σ p 2-machine with running time O(nk 2 log n), that requires circuit size > nk. This provides a constructive version of an existence theorem of Kannan [Kan82]. Our main theorem is on the negative side. We give evidence that it is infeasible to give relativizable proofs that any single language in the polynomial-time hierarchy requires super polynomial circuit size. Our proof techniques are based on the decision tree version of the Switching Lemma for constant depth circuits and Nisan-Wigderson pseudorandom generator.